ONE of the pillars of the microelectronics revolution is crumbling. The notion of “scaling” – the practice of shrinking transistors so that they operate at ever higher speeds – is reaching the end of the line. If transistors get any smaller, say experts, they will begin to malfunction.
Until now, scaling has both increased speeds and allowed the number of components that can be fitted on a chip to double about once every two years, a trend famously expressed as “Moore’s law”. Everyone knew that this could not go on forever, but no one expected the end to come so soon. Yet at a technology forum in Prague two weeks ago, chip makers were urged to focus on new ways to boost device performance – or face a sharp downturn in the rate at which processing power advances.
Most microchips on the market today, like Intel’s recent Pentium processors, are carved with features as small as 130 nanometres wide. The next generation just coming onto the market use 90-nanometre features, and they are already facing problems. “Somewhere between 130 nanometres and 90 nanometres the whole system fell apart,” says Bernie Meyerson, chief technologist at IBM. “Scaling stopped working and nobody seemed to notice.”
Advertisement
A transistor is basically a switch in which a voltage applied to one electrode, called the gate, switches current between two other electrodes on and off. The gate has to be insulated from the current-carrying channel by an oxide layer, and this layer can only be shrunk so far.
On chips with features smaller than 90-nanometres, the oxide layer becomes so thin that quantum effects take over and allow electrons to tunnel through it. This creates unwanted leakage currents, and to compensate chip makers run devices at higher power. But this also brings problems. In particular, it increases running temperature, which risks overheating and can produce unreliable outputs. Boosting power will rescue the scaling strategy for the next generation of 90-nanometre processors, but it won’t work for smaller architectures. The higher power levels they would require will simply destroy them. “Scaling is already dead,” Myerson says.
After the 90-nanometre chips, the microchip industry had been planning to move to 65-nanometre devices. But scaling will not bring them about without further power increases. Susumu Kohyama of the Japanese electronics firm Toshiba has calculated the power density – the power consumption per unit area of chip – for 65-nanometre devices would be equal to that of a steam iron. And at 22 nanometres, the power density would run away completely and melt the chip.
New ideas are needed to prevent progress in processing power grinding to a halt. “Innovation will increasingly dominate performance gains,” says Meyerson. As if to underline the point, Intel announced last week that it is abandoning two of its future processor designs. The Jayhawk and Tejas chips, which would have used 90-nanometre architecture, have been dropped in favour of “dual core” processors, which divide processing into two functional areas on a chip instead of one.
Using two slower cores each crunching bits at half the speed of a single fast core is one way to keep power consumption down while boosting processing speed, says Christos Papavassiliou, head of circuits and systems research at Imperial College London. But the price is higher design complexity, he says.
Another idea is to replace the oxide layer, where the scaling problems begin, with materials that have a high dielectric constant. Relatively thick layers of these so-called high-K materials can be made to have the same electrical properties as thinner oxide layers, allowing transistors to switch faster without making the components so small that they run into tunnelling.
Also on the horizon are a new breed of transistors called FinFETs that suffer much less from leakage currents (see “Fin-shaped transistors lead the way”). And a long-term move to replace the aluminium interconnections that wire together components on today’s chips with copper tracks will improve performance immensely, says Papavassiliou. That is because copper suffers less from the capacitive effects that slow signals down.
These solutions could radically change the industry. At present, improvements made by one company through scaling can be relatively easy for others to reproduce. “We are probably in a golden age where most manufacturing advances are accessible to everyone,” Papavassiliou says, and this has helped to encourage the competitive market in microchips. But as proprietary techniques take over, the lack of competition may mean tomorrow’s advanced processors come at a premium.
Fin-shaped transistors lead the way
One way to boost chip speed without shrinking transistors is to use a different transistor design. The fin-shaped field-effect transistor, or FinFET, is one attempt to do this.
A standard FET comprises a flat sandwich of semiconducting material with an insulating oxide layer on top and an electrode called a gate on top of that. Applying a voltage to the gate allows current to flow through the semiconductor layer.
The presence or absence of this current represents a digital 1 or 0. The problem with FET gates is that they leak current as they get smaller.
Unlike ordinary transistors, FinFETs are designed to stand vertically, sticking up like a fin. This allows the FinFET’s gate to be wrapped around both sides of the semiconductor, increasing the gate’s surface area.
This creates a higher switching current, which allows the transistor to switch faster, thus boosting processing speed.
